打开APP
userphoto
未登录

开通VIP,畅享免费电子书等14项超值服

开通VIP
Nios程序烧写到EPCS方法

这里主要是针对EP3C系列FPGA的Nios程序固化到EPCS中的方法做简要说明。
硬件SOPC
1、要固化程序到EPCS,在SOPC Builder中首先需要添加EPCS_Controller核,此外,CPU的reset vector设置为EPCS_Co
ntroller,Exception Vector一般设置为SDRAM即可。
2、生成该nios_cpu。对于EP3C系列的FPGA来说,在生成cpu后,会出现与EPCS_Controller相关的4根引线(如图),



这在之前的EP2C等早期系列的FPGA中是没有的,因为系统已经默认完成了相应的设置,而EP3C是需要自己来对这些引脚设置的,

这一点尤为要注意,下面就来具体说明一下。
这4根信号线分别为(EP3C10F256):
EPCS_DATA0   ->  H2
ASDO                 ->  C1
nCS0,(Flash_nCE)  ->  D2
DCLK                ->  H1
在对这4根引线进行引脚分配的时候,要在Device中将这些双功能引脚功能都设置为regular I/O Pin,
否则会出现错误:
比如:Error:Can't place multiple pins assigned to pin location PIN_H2
                        ......
对这些引脚做完这些设置后,即可进行编译、下载了(引脚分配如下图)。



另外,在使用Quartus II 10.0高版本编译Cyclone IV器件的时候,可能在Device->Dual Purpose里面的DCLK等引脚没有

USE AS Regular I/O选项,用户就无法给DCLK这些引脚指定Pin Assignment。
这时的解决办法是:
打开工程的.qsf文件,加上以下几句(若存在对这4个引脚的其它类似配置信息时,先删除):
set_global_assignment -name RESERVED_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVED_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVED_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVED_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
保存并编译,就可以正确读写EPCS了。
软件Nios
1、在nios中建立相应工程,并编译。
2、编译完成之后,打开FLASH Programmer。
勾上Program FPGA configuration data into hardware-image region of flash memory(将FPGA的配置文件写入Flash(EPCS)),
并设置对应的.sof文件Hardware Image设置为Custom,Memory设置为EPCS_Controller,offset为0x0,
不勾选Program a file into flash memory(可将二进制文件写入Flash)。
完成后如图所示:



以上所有设置完成后,Apply,然后Program Flash即可。烧写成功后,会有如下信息:


#!/bin/sh
#
# This file was automatically generated by the Nios II IDE Flash Programmer.
#
# It will be overwritten when the flash programmer options change.
#


cd D:/MySoftwares/QuartusII/Mywork/sopc_project/led_test/software/led_test/Debug


# Creating .flash file for the FPGA configuration
"$SOPC_KIT_NIOS2/bin/sof2flash" --epcs --input="D:/MySoftwares/QuartusII/Mywork/
sopc_project/led_test/led_test.sof" --output="led_test.flash" 
Info: *******************************************************************
Info: Running Quartus II Convert_programming_file
Info: Command: quartus_cpf --no_banner --convert --device=EPCS128 --option=led_t
est.opt D:/MySoftwares/QuartusII/Mywork/sopc_project/led_test/led_test.sof led_t
est.pof
Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 70 megabytes
    Info: Processing ended: Wed Mar 30 12:34:48 2011
    Info: Elapsed time: 00:00:02
    Info: Total CPU time (on all processors): 00:00:02
Info: *******************************************************************
Info: Running Quartus II Convert_programming_file
Info: Command: quartus_cpf --no_banner --convert led_test.pof led_test.rpd
Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 68 megabytes
    Info: Processing ended: Wed Mar 30 12:34:51 2011
    Info: Elapsed time: 00:00:03
    Info: Total CPU time (on all processors): 00:00:02


# Programming flash with the FPGA configuration
"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --epcs --base=0x01001800 --sidp=0x0
1002018 --id=1794073991 --timestamp=1301451768 --instance=0 "led_test.flash"
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
Resetting and pausing target processor: OK
Reading System ID at address 0x01002018: verified


              : Checksumming existing contents         


00000000      : Verifying existing contents            


00010000      : Verifying existing contents            


00020000      : Verifying existing contents            


00000000      : Reading existing contents              


00010000      : Reading existing contents              


00020000      : Reading existing contents              


Checksummed/read 54kB in 1.4s                                       


00000000 ( 0%): Erasing                                


00010000 (33%): Erasing                                


00020000 (66%): Erasing                                


Erased 192kB in 1.9s (101.0kB/s)                      


00000000 ( 0%): Programming                            


00010000 (33%): Programming                            


00020000 (66%): Programming                            


Programmed 139KB +53KB in 3.3s (58.1KB/s)                  
Did not attempt to verify device contents
Leaving target processor paused


# Creating .flash file for the project
"$SOPC_KIT_NIOS2/bin/elf2flash" --epcs --after="led_test.flash" --input="led_tes
t.elf" --output="epcs_controller.flash"


# Programming flash with the project
"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --epcs --base=0x01001800 --sidp=0x0
1002018 --id=1794073991 --timestamp=1301451768 --instance=0 "epcs_controller.fla
sh"
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
Resetting and pausing target processor: OK
Reading System ID at address 0x01002018: verified


              : Checksumming existing contents         


00020000      : Verifying existing contents            


00020000      : Reading existing contents              


Checksummed/read 42kB in 1.1s                                       


00020000 ( 0%): Erasing                                


Erased 64kB in 0.6s (106.6kB/s)                       


00020000 ( 0%): Programming                            


Programmed 23KB +41KB in 0.7s (91.4KB/s)                   
Did not attempt to verify device contents
Leaving target processor paused


烧写完成,Reset或者断电重启,烧写在EPCS中的程序即开始运行了。

本站仅提供存储服务,所有内容均由用户发布,如发现有害或侵权内容,请点击举报
打开APP,阅读全文并永久保存 查看更多类似文章
猜你喜欢
类似文章
【热】打开小程序,算一算2024你的财运
【精品博文】nios程序烧写到epcs方法
Altera FPGA带NiosII内核程序的JTAG下载方法总结
NIOS II 9.0 BUG
基于分布式参数电路模型检测电缆故障
用JTAG模式配置Serial Flash芯片
NIOS II开发纪录之总结NIOS II 开发注意点(一)
更多类似文章 >>
生活服务
热点新闻
分享 收藏 导长图 关注 下载文章
绑定账号成功
后续可登录账号畅享VIP特权!
如果VIP功能使用有故障,
可点击这里联系客服!

联系客服