JLink、JTAG接口详细图解

DBGACK

-

Thispin is connected in the RVI run control unit, but is not supportedin the current release of the software. It is reserved forcompatibility with other equipment to be used as a debugacknowledge signal from the target system. It is recommended thatthis signal is pulled LOW on the target.

DBGRQ

-

Thispin is connected in the RVI run control unit, but is not supportedin the current release of the software. It is reserved forcompatibility with other equipment to be used as a debug requestsignal to the target system. The RVI software maintains this signalas LOW.

Whenapplicable,RVI uses the scan chain 2 of the processor to put theprocessor in debug state. It is recommended that this signal ispulled LOW on the target.

GND

-

Ground.

nSRST

Input/output

ActiveLow output from RVI to the target system reset, with a 4.7kΩpull-up resistor for de-asserted state. This is also an input toRVI so that a reset initiated on the target can be reported to thedebugger.

This pin mustbe pulled HIGH on the target to avoid unintentional resets whenthere is no connection.

nTRST

Output

ActiveLow output from RVI to the Reset signal on the target JTAG port,driven to the VTref voltage for de-asserted state. This pin must bepulled HIGH on the target to avoid unintentional resets when thereis no connection.

RTCK

Input

ReturnTest Clock signal from the target JTAG port to RVI. Some targetsmust synchronize the JTAG inputs to internal clocks. To assist inmeeting this requirement, you can use a returned, andretimed, TCK todynamically control the TCK rate. RVIprovides Adaptive Clock Timing, that waitsfor TCK changesto be echoed correctly before making more changes. Targets that donot have to process TCK canground this pin.

RTCK is notsupported in Serial WireDebug (SWD) mode.

TCK

Output

TestClock signal from RVI to the target JTAG port. It is recommendedthat this pin is pulled LOW on the target.

TDI

Output

TestData In signal from RVI to the target JTAG port. It is recommendedthat this pin is pulled HIGH on the target.

TDO

Input

TestData Out from the target JTAG port to RVI. It is recommended thatthis pin is pulled HIGH on the target.

TMS

Output

TestMode signal from RVI to the target JTAG port. This pin must bepulled HIGH on the target so that the effect of anyspurious TCKs when there is noconnection is benign.

Vsupply

Input

Thispin is not connected in the RVI unit. It is reserved forcompatibility with other equipment to be used as a power feed fromthe target system.

VTref

Input

Thisis the target reference voltage. It indicates that the target haspower, and It must be at least0.628V. VTref isnormally fed from V_dd onthe target hardware and might have a series resistor (though thisis not recommended). There is a 10kΩ pull-down resistoron VTref inRVI.