Whether generating random device addresses, strengthening encryption algorithms or creating individual product keys, it is increasingly important to generate random numbers reliably. These random numbers are especially useful in everyday embedded systems, such as garage door receivers, which must uniquely and correctly identify the corresponding random number of the remote control to prevent unauthorized access.
In generating random numbers, developers can use a modern 16-bit microcontroller that keeps all signals internal to the MCU, making it a cheaper, more secure alternative to expensive analog hardware.
An MCU's random-number generation capabilities are enabled by a dual-clock chip architecture. A very low-frequency oscillator (VLO) and digitally controlled oscillator (DCO) are two independent clock systems, and the timing differences between them can be exploited to generate a stream of random bits.
In one VLO clock cycle, there will always be roughly the same number of DCO clocks. Because VLO and DCO clock sources vary independently of one another, however, it is impossible to predict whether the resulting number will be odd or even, making the device more secure. More important, the resulting number is not predictable even if the previous result is known.
Thanks to the flexibility of the VLO, its speed can be reduced to below that of the DCO. A timer can then be configured to count upward, with the DCO as its source clock, triggering a capture on the next VLO low-to-high transition.
This capture will record the number of DCO clock cycles in one VLO clock cycle. Because of the variance of the clock sources, each capture will result in similar, yet slightly different, amounts of DCO clocks counted per VLO cycle. This difference is the source of the random number. For example, to produce a 16-bit random number, 16 captures are taken, and the least significant byte (LSB) of each resultant captured number is shifted into a word in memory.
Using the timer peripheral for gathering random LSBs, a designer can achieve ultralow power consumption by keeping the CPU off during each capture cycle. The CPU is needed only briefly in order to shift the LSB into a memory location.
Although the described method is the primary source of randomness, the MSP430 clock system allows designers to incorporate feedback methods that can improve the performance of the algorithm when run against the FIPS 140-2 tests.
The first feedback mechanism is that the DCO is sped up slightly after each sampled bit. After each bit, the clock control register has the number five added to it. This addition causes the DCO's speed to increase relative to the VLO through each loop. Although any number could be used, it was found that five caused a large enough step change to vary the DCO significantly with respect to the VLO.
Additionally, each time an LSB is shifted, the two previously sampled random bits are XORed into the divider bits of the clock control register. These bits control the divider used for the VLO before it reaches the timer, while also changing the relationship between the VLO and DCO as measured by the timer.
Finally, each resultant bit is actually due to a majority vote of five loops, each of which generates its own LSB from the CCR, but the majority vote of five is used to select the final resultant bit.
Using this method, the MCU can generate a continuous stream of random bits using very little power. This bit stream could be used to create random numbers or, if modifications to a running application's clock structure are not desired, to generate an initial seed for a pseudorandom-number generator.
With this technique, it's possible to generate a stream of bits that can pass the FIPS 140-2 randomness test. That makes it useful for applications that require random numbers, especially as wireless technologies become more prevalent.
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