Mode 0: data sampled on rising clock edge, clock idles low
Mode 1: data sampled on falling clock edge, clock idles low
Mode 2: data sampled on falling clock edge, clock idles high
Mode 3: data sampled on rising clock edge, clock idles high
SPI does not specify any particular voltage levels, maximum speed rates, or addressing schemes. As a result, it is up to you to decide these factors. SPI speeds can easily exceed 10 Mbps, so make sure you read the datasheets for all your parts, as that will determine the acceptable voltages, speed limits, and supported modes.
Because of these speeds, SPI is useful for transferring large amounts of data. SPI is often found on sensors that require fast update rates, like accelerometers, display devices, LCDs, and flash memory devices.
I2C
Philips Semiconductors (now known as NXP Semiconductors) created the I2C specification in 1982 to help standardize communication between chips on the same board. NXP does not charge anyone to use or implement I2C, but they do charge a fee if you would like to register a device address.
I2C uses 2 lines (not including power and ground) for communication:
SDA: Serial Data
SCL: Serial Clock
Any number of master devices and any number of slave devices can theoretically be attached to the same bus. Both SDA and SCL lines are required to be open-drain lines. As a result, devices can only pull each line low. A pull-up resistor is required on each line to pull the line back up to high.
I2C connections for multiple master and multiple slave devices
Because of the open-drain design, I2C supports multiple masters on the same bus. If two devices start transmitting at the same time, one of them will eventually back off in a process known as "arbitration." Devices monitor the SDA line while they communicate. If a device sees that the SDA line is low when it is trying to transmit a logic high, it knows that another device is trying to communicate, and it will stop transmitting.
To begin communication, a master device will issue a START condition, where the SDA line is pulled low while the SCL line is still high. The master then sends out the 7-bit address of the intended recipient on the bus, followed by a write bit (0) or read bit (1). If a device on the bus has that particular address, it will respond by pulling the SDA line low (ACK bit).
Data can then be sent by the master or peripheral device in packets of 1 byte at a time; each byte should be acknowledged by the recipient with an ACK bit. Once communication is complete, the master will issue a STOP condition by releasing the SDA line (which will be pulled high) while SCL is high.
Data rate was originally limited to 100 kbps (standard mode). In 1992, Philips raised the speed cap to 400 kbps (fast mode). A special 3.4 Mbps mode (high-speed mode) was added 6 years later. A special set of commands must be given at lower speeds between master and peripheral to set up a high-speed connection.
While any number of devices can be physically attached to an I2C bus, the 7-bit address limits the actual number of devices. Some of the addresses are reserved, and therefore, only 112 different devices can be present on the same bus. A special 10-bit addressing mode can be enabled to allow for more devices, if necessary.
I2C has a form of flow control known as "clock stretching." A peripheral device can hold the SCL line low, which tells the master device to slow the transmission rate. This technique allows the peripheral some time to process data before responding.
Due to the low pin count required by I2C, many sensor manufacturers use this protocol in their chips. For example, temperature sensors, accelerometers, analog-to-digital converters, etc. can be found with I2C.
