七段显示译码器（when-else实现）：

 

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

 

ENTITY bcd IS

PORT(

           A:IN STD_LOGIC_VECTOR(3 DOWNTO 0);

           Y:OUT STD_LOGIC_VECTOR(6 DOWNTO 0)

          );

END bcd;

 

ARCHITECTURE art1 OF bcd IS

BEGIN

    Y<="1111110" WHEN "0000" ELSE

          "0001100" WHEN "0001" ELSE

          "1101101" WHEN "0010" ELSE

          "1111001" WHEN "0011" ELSE

          "0110011" WHEN "0100" ELSE

          "1011011" WHEN "0101" ELSE

          "0011111" WHEN "0110" ELSE

          "1110000" WHEN "0111" ELSE

          "1111111" WHEN "1000" ELSE

          "1110011" WHEN "1001" ELSE

          "0000000";

END art1;