Flip-Flop 触发器

触发器通常由FF表示，也称为双稳态多谐振荡器（bistable multivibrator），是一种脉冲数字电路，它可以在两个状态之间改变。触发器由几个晶体管构成，可以作为一位的存储器使用。触发器通常具有0、1、或2个输入信号；一个时钟信号；一个输出信号；许多商用触发器还为输出信号提供了一个互补的信号；某些触发器还包含一个清除输入信号用来复位当前的输出；作为集成电路芯片提供的触发器还要求电源和地连接。根据触发器输入信号的值以及触发器的特性等式，时钟信号的跳变（上升沿或下降沿）会引起触发器或者改变它的输出值或者保持它的输出值.

通常具有四种类型的触发器：

T flip-flop：T型触发器；

D fliip-flop：D型触发器；

SR flip-flop：SR触发器；

JK flip-flop：JK触发器

flip-flop 与 latch的区别:

《数字设计--原理和实践》(John F.Wakerly)书中的定义：

All digital designers use the name flip-flop for a sequential device that noramlly samples its inputs and changes its outputs only at times determined by a clocking signal. On the other hand, most digital designers use the name latch for a sequential device that watches all of its inputs continuously and changes its outputs at any time, independent of a clocking signal. Some text books and digital designers may (incorrectly) use the name "flip-flop" for a device that we call a "latch".

结论

-- 寄存器（register)：一般是指边沿触发的触发器，概念有点模糊。

-- 锁存器（latch)：电平触发。

-- 触发器（flip-flop)：边沿触发

-- 在fpga中一般避免用latch，因为在FPGA中触发器资源丰富，不用白不用，latch由于是电平触发的， 相对触发器来说容易产生毛刺，电路不稳定。latch的优点是完成同一个功能所需要的门较触发器要少，所以在asic中用的较多。

关于flip-flop，网上辞典的解释：

（1）An electronic circuit that alternates between two states. When current is applied, it changes to its opposite state (0 to 1 or 1 to 0). Made of several transistors, it is used in the design of static memories and hardware registers.

（2）<hardware> A digital logic circuit that can be in one of two states which it switches (or "toggles") between under control of its inputs. It can thus be considered as a one bit memory. Three types of flip-flop are common: the SR flip-flop, the JK flip-flop and the D-type flip-flop (or latch).

Early literature refers to the "Eccles-Jordan circuit" and the "Eccles-Jordan binary counter", using two vacuum tubes as the active (amplifying) elements for each bit of information storage. Later implementations using bipolar transistors could operate at up to 20 million state transitions per second as early as 1963.