AMD上海研发中心招聘ASIC Design Verification Engineer - SoC,请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司名称_工作年限” 为标题,把简历以附件形式发送到maggie1.zhang@amd.com ,请在正文称述应聘理由与优势。
AMD’s SCBU APU Design Verification team is looking for highly motivated Verification Engineers to work on next generation APU SoC development.
KEY RESPONSIBILITIES:
- Work closely with the SoC design team on understanding the APU system features being designed;
- Develop and execute test plans for system level functional features related to Memory Controller/ Power Management/ Coherency / Security / Multi-Media …etc.
- Design, implement and improve verification testbench in Verilog, System-Verilog, C/C++, OVM;
- Develop and refine test libraries, model and test cases;
- Apply functional coverage/assertion into testbench as enhancement;
REQUIREMENTS:
- At least 5 years DV experience with good understanding on IP level verification and system level verification;
- Good understanding on C/C++/Perl/Shell language;
- Have experienced at least 1 complete production cycle;
- Be fluent in English speaking and writing
- Self motivated;
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